JTAGMaster Boundary Scan Tester and Programmer
The JTAGMaster Tester and Programmer is a fully integrated solution for the configuration and diagnosis of Programmable Logic Devices (PLDs). This unit includes :
-
A boundary-scan tester to arbitrarily observe individual pins and therefore determine their functionality. This information can be saved in customisable test procedures which can also include pictures and datasheets.
- A programming interface designed to handle industry standard Jam STAPL files and SVF files (Serial Vector Format) to send programming instructions as well as testing functions to the device. ABI uses the JTAG Standards (Joint Test Action Group, compatible with IEEE1149.1) which ensures compatibility between all compliant ICs.
The JTAGMaster Tester and Programmer is designed to work with ABI’s bespoke software - a multiple purpose platform which enables users to freely configure test procedures and instruments. Integrated functions are also available to the user to automatically learn the device status, provide pin-to-pin comparison and information as well as use some reporting facilities.
With its ability to both test and program PLDs, this new ABI product allows users to verify the functionality of a device, download a bespoke program to a device or even re-test the device after it has been programmed !
Features
- Boundary scan testing
- Integrated JAM/SVF Player for programming
- Automatic detection of JTAG chains
- Automatic training function
- JTAG/IEEE 1149.1 compatible
- USB2.0 compatible
- Built-in power supply (1.8 to 3.3 Volts)
Technical Specifications
Electrical Requirements
Physical Specifications
Environmental Requirements
|
Computer Requirements
Included Accessories
|
Quotation
| Request Quotation for this product |










